This present invention relates to electronic circuit devices and, more particularly, to an apparatus and method of manufacturing through-holes, which are used, for example, in connecting power transistors on printed circuit boards, in semiconductors, and the like.
In assembling components for electronic devices, integrated circuit chips are mounted on multi-layer boards and cards which are then incorporated into a final product. It is known in the art to attach an integrated circuit chip, or power transistor, to a chip carrier that is then mounted on and secured to a multi-layer circuit board. Usually the chip is soldered to the chip carrier using various known methods such as wave soldering. The chip carrier usually includes pins extending from the surface that is opposite the side where the chip is attached. These pins extend into through-holes formed in the circuit board.
Increasingly, more and more devices are incorporated on a single chip, increasing the number of input and output channels (I/O""s) associated with a chip. Thousands of devices have been incorporated into a single chip. As the number of I/O""s increase, the number of connections between the integrated circuit and the circuit board and the number of through-holes which must be formed in the circuit board increases. Consequently, to reduce the amount of material that must be taken away from the circuit board to form a through-hole, and to greatly increase the I/O density, it is common to use direct chip methods to mount a chip directly on a printed circuit board.
With direct chip attachment methods, a chip is directly mounted on a circuit board using solder balls to connect the chip I/O""s to the through-holes in the multi-layer board. Such balls have a much smaller diameter than the pins associated with the chip carriers allowing the removal of less material from the board and the closer spacing of the through-holes. Direct chip attachment methods usually involve placing a solder ball directly over the through-holes in the board, then placing the board or chip on top of the balls so that the location of the balls corresponds to I/O""s on the chip, and finally soldering the assembly together.
Such multi-layer printed circuit boards used in the above application generally include a plurality of power and signal layers separated by insulating layers. The power, signal and insulating layers are laminated together in one structure making the board. The through-holes in the board for attaching chips, power transistors and the like, are often drilled either mechanically or with a laser all the way through the individual layers before the board is laminated. The manufacturing technique involves drilling all the way through each layer and then repeating this step with the other layers before lamination occurs. Additional preparation of each through-hole is required, before lamination of the layers occur. The result is a solidly laminated printed circuit board. As the number of I/O""s associated with a chip increases, the density of the through-holes increases. Consequently, because of the increased number of through-holes manufacturing is time consuming and expensive.
In one invention that avoids the problems associated with a high density of through-holes in the circuit board, multi-layer boards have been fabricated using cores. A plurality of cores that typically consist of a power plane, upper and lower signal layers, and plated through-holes extending through the thickness of the core, are first fabricated. A circuit board is formed by joining two or more cores together. In this method it is essential that the electrical connections be properly achieved between the vertically aligned plated through-holes and adjacent cores. This is difficult to achieve and elaborate jigs must be created to set up the circuit board.
Proper electrical connections joining cores have been achieved by applying an upper and lower cap to each core. The caps consist of a layer of conductive material. The electrically conductive material is then joined to a layer of electrically insulating material. Each cap includes via holes extending completely through the thickness of the insulating layer. These via holes are formed in the insulating layer at points corresponding to the plated through holes in the cores, so that when the cap is placed adjacent to the core the vias and the plated through-holes will be aligned. After the formation of the vias in the electrically insulating layer of the cap, electrically conductive material is deposited into each via hole using conventional electroplating techniques. However, this method requires numerous and costly steps in providing through-holes in a multi-layer heavy density printed circuit board.
There is yet another method of manufacturing a printed circuit board whereby through-holes are first formed, by photolithography, in a base plate having two main surfaces and electrically insulating, transparent and photosensitive properties. The through-holes extend from one of the main surfaces to the other, with a cross-sectional area thereof decreasing from opposite ends to an intermediate position. Conductive layers are formed to fill the through-holes and extend over the main surfaces of the base plate. Then the conductive layers formed on one of the main surfaces of the base plate are removed. Portions of the base plate are then removed from one of the main surfaces so that the conductive layers filling the through-holes project from one of the main surfaces of the base plate. This method requires through-holes in each surface to be individually formed prior to the different surfaces bonding to each other. This method of manufacturing is time consuming and costly because of the photolithography process.
In yet another invention there is a process for making an assembly of a semiconductor device that includes a hole forming step that forms a plurality of through-holes in a reinforced insulator plate. The plate has a first side pad electrode layer, a semiconductor layer having a first side semiconductor surface facing toward the first side pad electrode layer, and a second side semiconductor surface opposite to the first side semiconductor surface. Each of the through-holes extends from the first side plate surface of the reinforcing plate to a second side plate surface of the reinforcing plate.
The process further comprises a second side conductive layer forming step of forming a second side conductive layer on the second side plate surface of the reinforcing plate. Next there is a first side conductive layer preparing step of forming a second side conductive layer on the first side plate surface of the reinforcing plate.
As this method proceeds, it includes a first connecting step of connecting the first and second side conductive layers by filling a first conductive bonding material, in the through-holes, and joining the semiconductor piece and reinforcing plate by forming a layer of the first conductive bonding material between the first side electrode layer and the second side conductive layer. The next step is a grinding of the semiconductor piece mounted on the reinforced plate from the second side semiconductor surface to form a ground semiconductor surface. The reinforcing plate having through-holes for electrical connections enables the grinding and eventual bonding of the semiconductor piece to the reinforcing plate. However, this method of manufacturing is both time consuming with many manufacturing steps and therefore is costly.
In the manufacture of integrated circuit boards, the chip package designer attempts to obtain ever greater wiring densities while, at the same time, forming interconnections between adjacent layers that provide reliable circuits with as little inductance and resistance as possible. As a consequence, the through-holes that are used for interconnections are produce high quality interconnections.
It is known to use lasers to form vias in multi-layer boards. There is a process for manufacturing a multi-layer hybrid for a multi-chip module (MCM) device that uses a metallic conductive pattern layer formed on an inorganic insulating layer. Vias having a diameter of between 25-125 xcexcm are formed by laser drilling through an inorganic insulating layer for making electrical connections between conductive pattern layers. Again, this method is time consuming and costly to produce.
There is still another method for producing a low inductance via in a laminated substrate. A first dielectric layer is formed on a first conductive layer, and a second conductive layer is formed on the first dielectric layer. A first conductive path is formed in the first conductive layer that extends along a first route between a first node and an second node. A first blind via is formed in the first dielectric layer at the second node and is then connected to the first conductive path. A second conductive path is formed in the second conductive layer connected to the first blind via. The second conductive path extends between a third node and the first blind via along a second route that corresponds identically to at least a portion of the first route. A mutual inductance formed by the first conductive path with the second conductive path cancels a mutual inductance formed by the second conductive path with the first conductive path. Furthermore, buried vias are formed in the dielectric layers. Although, a plurality of low inductance vias can be formed by arranging the blind-vias and buried vias into rows and columns, this manufacturing method is time consuming and costly. It is costly because a laser individually drills the vias in each layer prior to lamination of the layers. Once lamination occurs, then the vias need to be cleaned out because of excess material that forms in the vias at the lamination interfaces.
What is needed for a printed circuit board assembly is a method of manufacturing such an assembly that will have small through-hole diameters and high through-hole aspect ratios yet save manufacturing time, material and cost over the prior art.
It is an aspect of the present invention to provide a method of manufacturing through-hole connections from the top side of the printed circuit board to the backing that is cost effective.
It is another aspect of the present to provide a method of manufacturing through-hole connections that can be applied to full metal backing or partial metal backing printed circuit boards.
It is yet another aspect of this invention to provide a method of manufacturing through-hole connections optimizing the heat dissipation of the printed circuit board backing.
These and other aspects are apparent in a method of manufacturing a printed circuit board through-hole connection includes forming a through-hole by removing material from the first side of the printed circuit board until the backing and then slightly into the first side of the backing providing a hole. Next, plating through the hole connecting the backing layer, ground layer, and signal layer. Now the plating of the signal layer is removed without removing the connection from the ground layer to the backing. Finally, the hole is filled from the first side of the printed circuit board.
A method of manufacturing a MMIC printed circuit board through-hole connection includes forming a through-hole by removing material from the first side of the MMIC printed circuit board through the first signal layer, through the MMIC until the second signal layer, and then slightly into the top side of the second signal layer. Once the material is removed, an electrical connection is provided to the first signal layer, the MMIC and the second signal layer.
A printed circuit board through-hole connection that includes an assembled layout of a printed circuit board and formed through holes by material removed from the first side of the printed circuit board up to the backing and then slightly into the top portion of the backing. It further includes plated through-holes that connect the backing, a ground layer and a signal layer, removed plating from the signal layer without the connection removed from the ground layer to the backing and filled through-holes from the first side with a non conductive filler.
These and other aspects of this invention will become apparent from the following description, the description being used to illustrate a preferred embodiment of the invention when read in conjunction with the accompanying drawings.